Atul Makwana1 and P.M. Jat2, 1Department of Information and Communication Technology, 2Dhirubhai Ambani University (DA-IICT), Gandhinagar, India
This Work Examines The Effectiveness Of The Zone-map Based Predicate Pushdown Works In Parquet. It Begins With Baseline Experiments That Perform Linear Scanning Of Zones To Find Relevant Data Blocks. The Baseline Study First Measures The Average Number Of Zones Checked Per Predicate With Different Zone Sizes. It Shows The Scalability Limits Of Linear Zone Searching. To Improve This, We Build A B+ Tree Index Over Zones Using Each Zone’s Minimum Value, Which Allows Us To Identify Relevant Zones During Predicate Searching Efficiently. The Proposed Method Narrows Down Predicate Evaluation To A Small Number Of Relevant Zones While Keeping The Zone Map Accurate. Experimental Results Compare Linear Zone-map Search And B+ Tree- Assisted Zone Mapping. They Evaluate The Average Zones Examined And The Construction Time Of The Index. The Results Show That B+ Tree Indexing Significantly Reduces Zone Access During Predicate Evaluation With Only A Small Preprocessing Cost.
Parquet, Predicate Pushdown, Zone, B+ Tree
Snehal Banerjee1, Sajjad Hyder2 1Undergraduate Student, Bachelor of Engineering, Department of Applied Electronics and Instrumentation Engineering, University Institute of Technology, The University of Burdwan,India 2Senior Consultant & Advisory-ESG; Adjunct Faculty, University Institute of Technology, The University of Burdwan, India
This paper presents the design and hardware implementation of a low-power digital event detection system for cricket wicket monitoring using logic gate-based signal processing and discrete switching architecture. The proposed system utilizes a conductive contact interface to transform mechanical bail displacement into a digital electrical signal. An IC 7404 Hex Inverter performs Boolean logic inversion, while a BC547 transistor switching stage controls LED indicators and an active buzzer for real-time audio-visual event indication. The developed hardware employs a rechargeable 3.7 V lithium-ion power source with USB Type-C and photovoltaic-assisted charging. Experimental validation demonstrates reliable operation, reduced circuit complexity, low power consumption and elimination of microcontroller-based processing. The proposed architecture provides a scalable foundation for future FPGA, IoT and advanced embedded system integration.
Digital Logic Architecture, Embedded System Design, Real-Time Event Detection, Low-Power Hardware Implementation, Discrete Switching Circuit
Jered McClain1 and Erydir Ceisiwr2, 1SEXA Institute of Technology and Interdomain Galactic Advisors Independent Researcher, USA 2SEXA Institute of Technology and Interdomain Galactic Advisors The Awen Grid — Polymathic Systems Architect, USA
The development of mathematically consistent computational architectures remains a fundamental challenge in artificial intelligence, symbolic computation, scientific computing, and hardware-assisted verification. This paper presents a conference-oriented computational formulation derived from the SEXA Unified Field Framework, emphasizing recursive admissibility, computational correspondence, dimensional reduction, and structured validation rather than introducing additional governing equations. The framework is evaluated through a structured survivability audit consisting of recursive functional consistency, dimensional and unit consistency, computational correspondence, reduction-recovery, and explicit falsifiability criteria. A deterministic computational correspondence layer, derived through Sigmatics-based recursive orbit analysis, provides a structured mapping between a 2880-dimensional recursive manifold and an operational five-dimensional computational representation. This correspondence establishes a reproducible computational framework intended for algorithmic evaluation while identifying engineering pathways for future hardware-assisted implementation. Unlike conventional presentations focused exclusively on mathematical abstraction, this work emphasizes computational reproducibility and verification methodology. The recursive architecture is organized into deterministic evaluation layers suitable for future implementation within embedded computing systems, recursive processing architectures, artificial intelligence acceleration, and hardware verification environments. The resulting framework distinguishes formal mathematical survivability from experimental confirmation while providing explicit computational objectives for continued engineering investigation
Recursive Computing; Computational Correspondence; Hardware Verification; Artificial Intelligence; Recursive Algorithms; Embedded Systems; Scientific Computing; Geometric Algebra; Dimensional Reduction; Recursive Manifold Dynamics; Computational Physics.
Shanda Brown, MA, LBA, BCBA1 Dot T Mental Health Alliance ( Virtual Organization), St. Louis, MO, USA
Addiction recovery is often viewed through biological, psychological, and social perspectives, yet many individuals also identify spirituality as a key element of healing. This paper introduces the Human-Centered Recovery Ecosystem, a conceptual framework examining how artificial intelligence (AI) may serve as a supplemental recovery support. Drawing on lived experience, behavioral theory, recovery literature, and professional observations, the paper explores AI's potential to promote self-reflection, values clarification, and behavior change. Rather than replacing professional, social, or spiritual supports, AI is proposed as an accessible adjunct tool that may enhance engagement with existing recovery resources. Opportunities, limitations, and ethical considerations are discussed.
Artificial Intelligence, Addiction Recovery, Human-Centered AI, Social Support, Behavioral Health
